1. Field of the Invention
The present invention relates to a voltage detecting circuit, and, more particularly relates to a voltage detecting circuit that detects a variation of an internal voltage generated within a semiconductor device. The present invention also relates to a semiconductor device including the voltage detecting circuit.
2. Description of Related Art
A power source voltage used in a semiconductor device such as a DRAM (Dynamic Random Access Memory) and the like has been reduced year by year, and power consumption has been also reduced accordingly. While a power source voltage has been generally 5 V in the past, it has been reduced thereafter to 3.3 V, and a voltage of about 1.2 V is often used at present.
However, depending on a kind of a semiconductor device, there are internal circuits requiring a higher voltage than the power source voltage. For example, in a DRAM, a selected word line is often set to a higher voltage than the power source voltage. In this case, a boosted internal voltage is necessary in a word-line driving circuit.
However, the internal voltage generated within the semiconductor device has a problem of easily generating a voltage variation as compared with a voltage supplied from the outside. Therefore, to stabilize the internal voltage, a voltage detecting circuit monitoring the internal voltage needs to be used to feed back an output of this circuit to an internal-voltage generating circuit (see Japanese Patent Application Laid-open Nos. H10-134574, 2000-014134, and 2001-067132).
FIG. 13 is a circuit diagram of a voltage detecting circuit 1 according to a related art.
The voltage detecting circuit 1 shown in FIG. 13 detects a variation of an internal voltage VPP boosted within a semiconductor device, and includes three resistors 2 to 4 connected in series between a power source wiring to which a higher potential VPP is supplied and a power source wiring to which a lower potential VSS (usually, a ground potential) is supplied. A detection signal Vdiff is output from a connection point between the resistor 3 and the resistor 4, and is supplied to a comparator 5. The comparator 5 compares a reference voltage Vref and the detection signal Vdiff, and generates a determination signal S based on the comparison. The determination signal S is supplied to an internal-voltage generating circuit (not shown), thereby controlling the boosting operation performed by the internal-voltage generating circuit.
However, the voltage detecting circuit 1 shown in FIG. 13 generates the detection signal Vdiff by resistance-dividing the internal voltage VPP. Therefore, a variation amount appearing in the detection signal Vdiff becomes small even when the internal voltage VPP varies. Specifically, a relationship Vdiff=VPP/3 is established. In this way, the variation amount of the detection signal Vdiff also becomes one third of the variation of the internal voltage VPP. Therefore, sensitivity to a voltage variation is small, and it has been difficult to sufficiently stabilize the internal voltage.